/****************************************************************************
 *
 * Copyright 2016 Samsung Electronics All Rights Reserved.
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 * http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing,
 * software distributed under the License is distributed on an
 * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
 * either express or implied. See the License for the specific
 * language governing permissions and limitations under the License.
 *
 ****************************************************************************/
/****************************************************************************
 * arch/arm/src/s5j/s5j_cmu.h
 *
 *   Copyright (C) 2009-2010, 2014-2015 Gregory Nutt. All rights reserved.
 *   Author: Gregory Nutt <gnutt@nuttx.org>
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in
 *    the documentation and/or other materials provided with the
 *    distribution.
 * 3. Neither the name NuttX nor the names of its contributors may be
 *    used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 *
 ****************************************************************************/

#ifndef __ARCH_ARM_SRC_S5J_S5J_CMU_H__
#define __ARCH_ARM_SRC_S5J_S5J_CMU_H__

#define WPLL_CON0	((void *)(S5J_CMU_BASE + 0x0))
#define WPLL_CON1	((void *)(S5J_CMU_BASE + 0x4))
#define WPLL_CON2	((void *)(S5J_CMU_BASE + 0x8))
#define WPLL_CON3	((void *)(S5J_CMU_BASE + 0xc))
#define WPLL_CON4	((void *)(S5J_CMU_BASE + 0x10))
#define WPLL_CON5	((void *)(S5J_CMU_BASE + 0x14))
#define WPLL_STAT	((void *)(S5J_CMU_BASE + 0x18))
#define PLL_CON0_MUX_CLKCMU_WPLL_USER	((void *)(S5J_CMU_BASE + 0x180))
#define PLL_CON1_MUX_CLKCMU_WPLL_USER	((void *)(S5J_CMU_BASE + 0x184))
#define PLL_CON2_MUX_CLKCMU_WPLL_USER	((void *)(S5J_CMU_BASE + 0x188))
#define MCU_CMU_CONTROLLER_OPTION		((void *)(S5J_CMU_BASE + 0x800))
#define CLKOUT_CON_BLK_MCU_CMU_CLKOUT0	((void *)(S5J_CMU_BASE + 0x810))
#define MCU_SPARE0	((void *)(S5J_CMU_BASE + 0xa00))
#define MCU_SPARE1	((void *)(S5J_CMU_BASE + 0xa04))
#define CLK_CON_MUX_MUX_CLKCMU_I2SB		((void *)(S5J_CMU_BASE + 0x1000))
#define CLK_CON_MUX_MUX_CLKCMU_UART		((void *)(S5J_CMU_BASE + 0x100c))
#define CLK_CON_DIV_DIV_CLK_SERIALFLASH	((void *)(S5J_CMU_BASE + 0x1800))
#define CLK_CON_DIV_DIV_CLK_SPI			((void *)(S5J_CMU_BASE + 0x1804))
#define CLK_CON_DIV_DIV_CLK_SPI1		((void *)(S5J_CMU_BASE + 0x1808))
#define CLK_CON_DIV_DIV_CLK_SPI2		((void *)(S5J_CMU_BASE + 0x180c))
#define CLK_CON_DIV_DIV_CLK_SPI3		((void *)(S5J_CMU_BASE + 0x1810))
#define CLK_CON_DIV_DIV_WPLL_DIV12		((void *)(S5J_CMU_BASE + 0x1814))
#define CLK_CON_DIV_DIV_WPLL_DIV3		((void *)(S5J_CMU_BASE + 0x1818))
#define CLK_CON_DIV_DIV_WPLL_DIV6		((void *)(S5J_CMU_BASE + 0x181c))
#define CLK_CON_GAT_CLKCMU_WPLL_DIV12	((void *)(S5J_CMU_BASE + 0x2000))
#define CLK_CON_GAT_CLK_BLK_MCU_UID_ADC_IF_IPCLKPORT_I_OSCCLK		((void *)(S5J_CMU_BASE + 0x2004))
#define CLK_CON_GAT_CLK_BLK_MCU_UID_CM0P_STCLKEN_IPCLKPORT_OSCCLK	((void *)(S5J_CMU_BASE + 0x2008))
#define CLK_CON_GAT_CLK_BLK_MCU_UID_GPIOCON_IPCLKPORT_CLK			((void *)(S5J_CMU_BASE + 0x200c))
#define CLK_CON_GAT_CLK_BLK_MCU_UID_I2S_IPCLKPORT_I2SBCLKI			((void *)(S5J_CMU_BASE + 0x2010))
#define CLK_CON_GAT_CLK_BLK_MCU_UID_MCT0_IPCLKPORT_OSCCLK__ALO		((void *)(S5J_CMU_BASE + 0x2014))
#define CLK_CON_GAT_CLK_BLK_MCU_UID_MCU_CMU_MCU_IPCLKPORT_PCLK		((void *)(S5J_CMU_BASE + 0x2018))
#define CLK_CON_GAT_CLK_BLK_MCU_UID_PWM0_IPCLKPORT_I_OSCCLK			((void *)(S5J_CMU_BASE + 0x201c))
#define CLK_CON_GAT_CLK_BLK_MCU_UID_PWM1_IPCLKPORT_I_OSCCLK			((void *)(S5J_CMU_BASE + 0x2020))
#define CLK_CON_GAT_CLK_BLK_MCU_UID_SYSREG_IPCLKPORT_CLK			((void *)(S5J_CMU_BASE + 0x2028))
#define CLK_CON_GAT_CLK_BLK_MCU_UID_UHD_EFUSE_WRITER_IPCLKPORT_I_OSCCLK	((void *)(S5J_CMU_BASE + 0x2034))
#define CLK_CON_GAT_CLK_BLK_MCU_UID_WDT_IPCLKPORT_CLK				((void *)(S5J_CMU_BASE + 0x2038))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_ADC_IF_IPCLKPORT_PCLK_S0		((void *)(S5J_CMU_BASE + 0x203c))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_AHB2AXI_CM0P_IPCLKPORT_ACLK	((void *)(S5J_CMU_BASE + 0x2040))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_AHB2AXI_SDIO_IPCLKPORT_ACLK	((void *)(S5J_CMU_BASE + 0x2044))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_APB_ASYNC_CSSYS_IPCLKPORT_PCLKM	((void *)(S5J_CMU_BASE + 0x2048))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_APB_ASYNC_CSSYS_IPCLKPORT_PCLKS	((void *)(S5J_CMU_BASE + 0x204c))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_APB_ASYNC_PDMA_IPCLKPORT_PCLKM	((void *)(S5J_CMU_BASE + 0x2050))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_APB_ASYNC_PDMA_IPCLKPORT_PCLKS	((void *)(S5J_CMU_BASE + 0x2054))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_AXI2AHB_FLASH_IPCLKPORT_ACLK	((void *)(S5J_CMU_BASE + 0x2058))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_AXI2AHB_SDIO_IPCLKPORT_ACLK	((void *)(S5J_CMU_BASE + 0x205c))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_AXI2APB_PERIC_IPCLKPORT_ACLK	((void *)(S5J_CMU_BASE + 0x2060))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_AXI2APB_PERIS0_IPCLKPORT_ACLK	((void *)(S5J_CMU_BASE + 0x2064))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_AXI2APB_PERIS1_IPCLKPORT_ACLK	((void *)(S5J_CMU_BASE + 0x2068))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_CM0P_IPCLKPORT_DCLK	((void *)(S5J_CMU_BASE + 0x206c))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_CM0P_IPCLKPORT_HCLK	((void *)(S5J_CMU_BASE + 0x2070))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_CM0P_IPCLKPORT_SCLK	((void *)(S5J_CMU_BASE + 0x2074))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_CSSYS_IPCLKPORT_PCLKDBG		((void *)(S5J_CMU_BASE + 0x2078))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_DS_64TO32_AHB_SDIO_IPCLKPORT_ACLK	((void *)(S5J_CMU_BASE + 0x207c))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_DS_64TO32_DP_IPCLKPORT_ACLK		((void *)(S5J_CMU_BASE + 0x2080))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_DS_64TO32_FLASH_IPCLKPORT_ACLK		((void *)(S5J_CMU_BASE + 0x2084))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_GIC400_INPUT_SYNC_IPCLKPORT_CLK	((void *)(S5J_CMU_BASE + 0x2088))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_GIC400_IPCLKPORT_CLK		((void *)(S5J_CMU_BASE + 0x208c))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_HSI2C0_IPCLKPORT_IPCLK		((void *)(S5J_CMU_BASE + 0x2090))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_HSI2C1_IPCLKPORT_IPCLK		((void *)(S5J_CMU_BASE + 0x2094))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_HSI2C2_IPCLKPORT_IPCLK		((void *)(S5J_CMU_BASE + 0x2098))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_HSI2C3_IPCLKPORT_IPCLK		((void *)(S5J_CMU_BASE + 0x209c))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_I2S_IPCLKPORT_PCLK			((void *)(S5J_CMU_BASE + 0x20a0))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_INTMEM_IPCLKPORT_ACLK		((void *)(S5J_CMU_BASE + 0x20a4))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_INTMEM_SHARED_IPCLKPORT_ACLK	((void *)(S5J_CMU_BASE + 0x20a8))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_ISO_CR4_IPCLKPORT_CLKIN	((void *)(S5J_CMU_BASE + 0x20ac))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_ISO_CR4_IPCLKPORT_FREECLKIN	((void *)(S5J_CMU_BASE + 0x20b0))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_ISO_CR4_IPCLKPORT_PCLKDBG	((void *)(S5J_CMU_BASE + 0x20b4))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_LHM_AXI_D_WIFI_IPCLKPORT_I_CLK	((void *)(S5J_CMU_BASE + 0x20b8))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_LHM_DP_IPCLKPORT_I_CLK		((void *)(S5J_CMU_BASE + 0x20bc))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_LHS_DP_IPCLKPORT_I_CLK		((void *)(S5J_CMU_BASE + 0x20c0))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_MAILBOX_M0_IPCLKPORT_CLK	((void *)(S5J_CMU_BASE + 0x20c4))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_MAILBOX_WIFI_IPCLKPORT_CLK	((void *)(S5J_CMU_BASE + 0x20c8))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_MCT0_IPCLKPORT_PCLK		((void *)(S5J_CMU_BASE + 0x20cc))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_PDMA_IPCLKPORT_ACLK_PDMA1	((void *)(S5J_CMU_BASE + 0x20d0))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_PMU_IPCLKPORT_PCLK			((void *)(S5J_CMU_BASE + 0x20d4))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_PMU_IPCLKPORT_PCLK_CSSYS	((void *)(S5J_CMU_BASE + 0x20d8))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_PUF_SYSTEM_IPCLKPORT_I_CLK	((void *)(S5J_CMU_BASE + 0x20dc))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_PWM0_IPCLKPORT_I_PCLK_S0	((void *)(S5J_CMU_BASE + 0x20e0))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_PWM1_IPCLKPORT_I_PCLK_S0	((void *)(S5J_CMU_BASE + 0x20e4))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_SDIO_DEVICE_IPCLKPORT_CLK_AHB	((void *)(S5J_CMU_BASE + 0x20f4))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_SERIALFLASH_IPCLKPORT_HCLK		((void *)(S5J_CMU_BASE + 0x20f8))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_SERIALFLASH_IPCLKPORT_SFCLK	((void *)(S5J_CMU_BASE + 0x20fc))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_SFR_APBIF_GPIO_IPCLKPORT_PCLK	((void *)(S5J_CMU_BASE + 0x2100))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_SPI0_IPCLKPORT_PCLK		((void *)(S5J_CMU_BASE + 0x2104))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_SPI0_IPCLKPORT_SPI_EXT_CLK	((void *)(S5J_CMU_BASE + 0x2108))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_SPI1_IPCLKPORT_PCLK		((void *)(S5J_CMU_BASE + 0x210c))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_SPI1_IPCLKPORT_SPI_EXT_CLK	((void *)(S5J_CMU_BASE + 0x2110))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_SPI2_IPCLKPORT_PCLK		((void *)(S5J_CMU_BASE + 0x2114))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_SPI2_IPCLKPORT_SPI_EXT_CLK	((void *)(S5J_CMU_BASE + 0x2118))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_SPI3_IPCLKPORT_PCLK		((void *)(S5J_CMU_BASE + 0x211c))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_SPI3_IPCLKPORT_SPI_EXT_CLK	((void *)(S5J_CMU_BASE + 0x2120))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_SWEEPER_WIFI_IPCLKPORT_ACLK	((void *)(S5J_CMU_BASE + 0x2124))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_SYSREG_IPCLKPORT_PCLK		((void *)(S5J_CMU_BASE + 0x2128))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_TICK_COUNTER_IPCLKPORT_PCLK	((void *)(S5J_CMU_BASE + 0x212c))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_TOP_RTC_IPCLKPORT_PCLK		((void *)(S5J_CMU_BASE + 0x2130))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_UART0_IPCLKPORT_EXT_UCLK	((void *)(S5J_CMU_BASE + 0x2134))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_UART0_IPCLKPORT_PCLK		((void *)(S5J_CMU_BASE + 0x2138))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_UART1_IPCLKPORT_EXT_UCLK	((void *)(S5J_CMU_BASE + 0x213c))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_UART1_IPCLKPORT_PCLK		((void *)(S5J_CMU_BASE + 0x2140))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_UART2_IPCLKPORT_EXT_UCLK	((void *)(S5J_CMU_BASE + 0x2144))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_UART2_IPCLKPORT_PCLK		((void *)(S5J_CMU_BASE + 0x2148))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_UART3_IPCLKPORT_EXT_UCLK	((void *)(S5J_CMU_BASE + 0x214c))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_UART3_IPCLKPORT_PCLK		((void *)(S5J_CMU_BASE + 0x2150))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_UART_DEBUG_IPCLKPORT_EXT_UCLK	((void *)(S5J_CMU_BASE + 0x2154))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_UART_DEBUG_IPCLKPORT_PCLK		((void *)(S5J_CMU_BASE + 0x2158))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_UHD_EFUSE_WRITER_IPCLKPORT_PCLK	((void *)(S5J_CMU_BASE + 0x215c))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_US_32TO64_CM0P_IPCLKPORT_ACLK	((void *)(S5J_CMU_BASE + 0x2160))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_US_32TO64_PDMA_IPCLKPORT_ACLK	((void *)(S5J_CMU_BASE + 0x2164))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_US_32TO64_SDIO_IPCLKPORT_ACLK	((void *)(S5J_CMU_BASE + 0x2168))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_WDT_IPCLKPORT_PCLK			((void *)(S5J_CMU_BASE + 0x216c))
#define CLK_CON_GAT_GOUT_BLK_MCU_UID_XIU_P_T20_IPCLKPORT_ACLK	((void *)(S5J_CMU_BASE + 0x2174))
#define DMYQCH_CON_ISO_CR4_QCH		((void *)(S5J_CMU_BASE + 0x3014))
#define DMYQCH_CON_XIU_D_T20_QCH	((void *)(S5J_CMU_BASE + 0x3020))
#define QCH_CON_LHM_AXI_D_WIFI_QCH	((void *)(S5J_CMU_BASE + 0x3024))
#define QCH_CON_LHM_DP_QCH			((void *)(S5J_CMU_BASE + 0x3028))
#define QCH_CON_LHS_DP_QCH			((void *)(S5J_CMU_BASE + 0x302c))
#define QCH_CON_MCU_CMU_MCU_QCH		((void *)(S5J_CMU_BASE + 0x3030))
#define QUEUE_CTRL_REG_BLK_MCU_CMU_MCU	((void *)(S5J_CMU_BASE + 0x3c00))
#define DBG_NFO_MUX_CLKCMU_WPLL_USER	((void *)(S5J_CMU_BASE + 0x4080))
#define DBG_NFO_BLK_MCU_CMU_CLKOUT0	((void *)(S5J_CMU_BASE + 0x4810))
#define DBG_NFO_MUX_CLKCMU_I2SB		((void *)(S5J_CMU_BASE + 0x5000))
#define DBG_NFO_MUX_CLKCMU_UART		((void *)(S5J_CMU_BASE + 0x500c))
#define DBG_NFO_DIV_CLK_SERIALFLASH	((void *)(S5J_CMU_BASE + 0x5800))
#define DBG_NFO_DIV_CLK_SPI			((void *)(S5J_CMU_BASE + 0x5804))
#define DBG_NFO_DIV_CLK_SPI1		((void *)(S5J_CMU_BASE + 0x5808))
#define DBG_NFO_DIV_CLK_SPI2		((void *)(S5J_CMU_BASE + 0x580c))
#define DBG_NFO_DIV_CLK_SPI3		((void *)(S5J_CMU_BASE + 0x5810))
#define DBG_NFO_DIV_WPLL_DIV12		((void *)(S5J_CMU_BASE + 0x5814))
#define DBG_NFO_DIV_WPLL_DIV3		((void *)(S5J_CMU_BASE + 0x5818))
#define DBG_NFO_DIV_WPLL_DIV6		((void *)(S5J_CMU_BASE + 0x581c))
#define DBG_NFO_CLKCMU_WPLL_DIV12	((void *)(S5J_CMU_BASE + 0x6000))
#define DBG_NFO_CLK_BLK_MCU_UID_ADC_IF_IPCLKPORT_I_OSCCLK		((void *)(S5J_CMU_BASE + 0x6004))
#define DBG_NFO_CLK_BLK_MCU_UID_CM0P_STCLKEN_IPCLKPORT_OSCCLK	((void *)(S5J_CMU_BASE + 0x6008))
#define DBG_NFO_CLK_BLK_MCU_UID_GPIOCON_IPCLKPORT_CLK			((void *)(S5J_CMU_BASE + 0x600c))
#define DBG_NFO_CLK_BLK_MCU_UID_I2S_IPCLKPORT_I2SBCLKI			((void *)(S5J_CMU_BASE + 0x6010))
#define DBG_NFO_CLK_BLK_MCU_UID_MCT0_IPCLKPORT_OSCCLK__ALO		((void *)(S5J_CMU_BASE + 0x6014))
#define DBG_NFO_CLK_BLK_MCU_UID_MCU_CMU_MCU_IPCLKPORT_PCLK		((void *)(S5J_CMU_BASE + 0x6018))
#define DBG_NFO_CLK_BLK_MCU_UID_PWM0_IPCLKPORT_I_OSCCLK			((void *)(S5J_CMU_BASE + 0x601c))
#define DBG_NFO_CLK_BLK_MCU_UID_PWM1_IPCLKPORT_I_OSCCLK			((void *)(S5J_CMU_BASE + 0x6020))
#define DBG_NFO_CLK_BLK_MCU_UID_SYSREG_IPCLKPORT_CLK			((void *)(S5J_CMU_BASE + 0x6028))
#define DBG_NFO_CLK_BLK_MCU_UID_UHD_EFUSE_WRITER_IPCLKPORT_I_OSCCLK	((void *)(S5J_CMU_BASE + 0x6034))
#define DBG_NFO_CLK_BLK_MCU_UID_WDT_IPCLKPORT_CLK				((void *)(S5J_CMU_BASE + 0x6038))
#define DBG_NFO_GOUT_BLK_MCU_UID_ADC_IF_IPCLKPORT_PCLK_S0		((void *)(S5J_CMU_BASE + 0x603c))
#define DBG_NFO_GOUT_BLK_MCU_UID_AHB2AXI_CM0P_IPCLKPORT_ACLK	((void *)(S5J_CMU_BASE + 0x6040))
#define DBG_NFO_GOUT_BLK_MCU_UID_AHB2AXI_SDIO_IPCLKPORT_ACLK	((void *)(S5J_CMU_BASE + 0x6044))
#define DBG_NFO_GOUT_BLK_MCU_UID_APB_ASYNC_CSSYS_IPCLKPORT_PCLKM	((void *)(S5J_CMU_BASE + 0x6048))
#define DBG_NFO_GOUT_BLK_MCU_UID_APB_ASYNC_CSSYS_IPCLKPORT_PCLKS	((void *)(S5J_CMU_BASE + 0x604c))
#define DBG_NFO_GOUT_BLK_MCU_UID_APB_ASYNC_PDMA_IPCLKPORT_PCLKM	((void *)(S5J_CMU_BASE + 0x6050))
#define DBG_NFO_GOUT_BLK_MCU_UID_APB_ASYNC_PDMA_IPCLKPORT_PCLKS	((void *)(S5J_CMU_BASE + 0x6054))
#define DBG_NFO_GOUT_BLK_MCU_UID_AXI2AHB_FLASH_IPCLKPORT_ACLK	((void *)(S5J_CMU_BASE + 0x6058))
#define DBG_NFO_GOUT_BLK_MCU_UID_AXI2AHB_SDIO_IPCLKPORT_ACLK	((void *)(S5J_CMU_BASE + 0x605c))
#define DBG_NFO_GOUT_BLK_MCU_UID_AXI2APB_PERIC_IPCLKPORT_ACLK	((void *)(S5J_CMU_BASE + 0x6060))
#define DBG_NFO_GOUT_BLK_MCU_UID_AXI2APB_PERIS0_IPCLKPORT_ACLK	((void *)(S5J_CMU_BASE + 0x6064))
#define DBG_NFO_GOUT_BLK_MCU_UID_AXI2APB_PERIS1_IPCLKPORT_ACLK	((void *)(S5J_CMU_BASE + 0x6068))
#define DBG_NFO_GOUT_BLK_MCU_UID_CM0P_IPCLKPORT_DCLK	((void *)(S5J_CMU_BASE + 0x606c))
#define DBG_NFO_GOUT_BLK_MCU_UID_CM0P_IPCLKPORT_HCLK	((void *)(S5J_CMU_BASE + 0x6070))
#define DBG_NFO_GOUT_BLK_MCU_UID_CM0P_IPCLKPORT_SCLK	((void *)(S5J_CMU_BASE + 0x6074))
#define DBG_NFO_GOUT_BLK_MCU_UID_CSSYS_IPCLKPORT_PCLKDBG			((void *)(S5J_CMU_BASE + 0x6078))
#define DBG_NFO_GOUT_BLK_MCU_UID_DS_64TO32_AHB_SDIO_IPCLKPORT_ACLK	((void *)(S5J_CMU_BASE + 0x607c))
#define DBG_NFO_GOUT_BLK_MCU_UID_DS_64TO32_DP_IPCLKPORT_ACLK		((void *)(S5J_CMU_BASE + 0x6080))
#define DBG_NFO_GOUT_BLK_MCU_UID_DS_64TO32_FLASH_IPCLKPORT_ACLK		((void *)(S5J_CMU_BASE + 0x6084))
#define DBG_NFO_GOUT_BLK_MCU_UID_GIC400_INPUT_SYNC_IPCLKPORT_CLK	((void *)(S5J_CMU_BASE + 0x6088))
#define DBG_NFO_GOUT_BLK_MCU_UID_GIC400_IPCLKPORT_CLK	((void *)(S5J_CMU_BASE + 0x608c))
#define DBG_NFO_GOUT_BLK_MCU_UID_HSI2C0_IPCLKPORT_IPCLK	((void *)(S5J_CMU_BASE + 0x6090))
#define DBG_NFO_GOUT_BLK_MCU_UID_HSI2C1_IPCLKPORT_IPCLK	((void *)(S5J_CMU_BASE + 0x6094))
#define DBG_NFO_GOUT_BLK_MCU_UID_HSI2C2_IPCLKPORT_IPCLK	((void *)(S5J_CMU_BASE + 0x6098))
#define DBG_NFO_GOUT_BLK_MCU_UID_HSI2C3_IPCLKPORT_IPCLK	((void *)(S5J_CMU_BASE + 0x609c))
#define DBG_NFO_GOUT_BLK_MCU_UID_I2S_IPCLKPORT_PCLK		((void *)(S5J_CMU_BASE + 0x60a0))
#define DBG_NFO_GOUT_BLK_MCU_UID_INTMEM_IPCLKPORT_ACLK	((void *)(S5J_CMU_BASE + 0x60a4))
#define DBG_NFO_GOUT_BLK_MCU_UID_INTMEM_SHARED_IPCLKPORT_ACLK	((void *)(S5J_CMU_BASE + 0x60a8))
#define DBG_NFO_GOUT_BLK_MCU_UID_ISO_CR4_IPCLKPORT_CLKIN		((void *)(S5J_CMU_BASE + 0x60ac))
#define DBG_NFO_GOUT_BLK_MCU_UID_ISO_CR4_IPCLKPORT_FREECLKIN	((void *)(S5J_CMU_BASE + 0x60b0))
#define DBG_NFO_GOUT_BLK_MCU_UID_ISO_CR4_IPCLKPORT_PCLKDBG		((void *)(S5J_CMU_BASE + 0x60b4))
#define DBG_NFO_GOUT_BLK_MCU_UID_LHM_AXI_D_WIFI_IPCLKPORT_I_CLK	((void *)(S5J_CMU_BASE + 0x60b8))
#define DBG_NFO_GOUT_BLK_MCU_UID_LHM_DP_IPCLKPORT_I_CLK		((void *)(S5J_CMU_BASE + 0x60bc))
#define DBG_NFO_GOUT_BLK_MCU_UID_LHS_DP_IPCLKPORT_I_CLK		((void *)(S5J_CMU_BASE + 0x60c0))
#define DBG_NFO_GOUT_BLK_MCU_UID_MAILBOX_M0_IPCLKPORT_CLK	((void *)(S5J_CMU_BASE + 0x60c4))
#define DBG_NFO_GOUT_BLK_MCU_UID_MAILBOX_WIFI_IPCLKPORT_CLK	((void *)(S5J_CMU_BASE + 0x60c8))
#define DBG_NFO_GOUT_BLK_MCU_UID_MCT0_IPCLKPORT_PCLK		((void *)(S5J_CMU_BASE + 0x60cc))
#define DBG_NFO_GOUT_BLK_MCU_UID_PDMA_IPCLKPORT_ACLK_PDMA1	((void *)(S5J_CMU_BASE + 0x60d0))
#define DBG_NFO_GOUT_BLK_MCU_UID_PMU_IPCLKPORT_PCLK			((void *)(S5J_CMU_BASE + 0x60d4))
#define DBG_NFO_GOUT_BLK_MCU_UID_PMU_IPCLKPORT_PCLK_CSSYS	((void *)(S5J_CMU_BASE + 0x60d8))
#define DBG_NFO_GOUT_BLK_MCU_UID_PUF_SYSTEM_IPCLKPORT_I_CLK	((void *)(S5J_CMU_BASE + 0x60dc))
#define DBG_NFO_GOUT_BLK_MCU_UID_PWM0_IPCLKPORT_I_PCLK_S0	((void *)(S5J_CMU_BASE + 0x60e0))
#define DBG_NFO_GOUT_BLK_MCU_UID_PWM1_IPCLKPORT_I_PCLK_S0	((void *)(S5J_CMU_BASE + 0x60e4))
#define DBG_NFO_GOUT_BLK_MCU_UID_SDIO_DEVICE_IPCLKPORT_CLK_AHB	((void *)(S5J_CMU_BASE + 0x60f4))
#define DBG_NFO_GOUT_BLK_MCU_UID_SERIALFLASH_IPCLKPORT_HCLK		((void *)(S5J_CMU_BASE + 0x60f8))
#define DBG_NFO_GOUT_BLK_MCU_UID_SERIALFLASH_IPCLKPORT_SFCLK	((void *)(S5J_CMU_BASE + 0x60fc))
#define DBG_NFO_GOUT_BLK_MCU_UID_SFR_APBIF_GPIO_IPCLKPORT_PCLK	((void *)(S5J_CMU_BASE + 0x6100))
#define DBG_NFO_GOUT_BLK_MCU_UID_SPI0_IPCLKPORT_PCLK		((void *)(S5J_CMU_BASE + 0x6104))
#define DBG_NFO_GOUT_BLK_MCU_UID_SPI0_IPCLKPORT_SPI_EXT_CLK	((void *)(S5J_CMU_BASE + 0x6108))
#define DBG_NFO_GOUT_BLK_MCU_UID_SPI1_IPCLKPORT_PCLK		((void *)(S5J_CMU_BASE + 0x610c))
#define DBG_NFO_GOUT_BLK_MCU_UID_SPI1_IPCLKPORT_SPI_EXT_CLK	((void *)(S5J_CMU_BASE + 0x6110))
#define DBG_NFO_GOUT_BLK_MCU_UID_SPI2_IPCLKPORT_PCLK		((void *)(S5J_CMU_BASE + 0x6114))
#define DBG_NFO_GOUT_BLK_MCU_UID_SPI2_IPCLKPORT_SPI_EXT_CLK	((void *)(S5J_CMU_BASE + 0x6118))
#define DBG_NFO_GOUT_BLK_MCU_UID_SPI3_IPCLKPORT_PCLK		((void *)(S5J_CMU_BASE + 0x611c))
#define DBG_NFO_GOUT_BLK_MCU_UID_SPI3_IPCLKPORT_SPI_EXT_CLK	((void *)(S5J_CMU_BASE + 0x6120))
#define DBG_NFO_GOUT_BLK_MCU_UID_SWEEPER_WIFI_IPCLKPORT_ACLK	((void *)(S5J_CMU_BASE + 0x6124))
#define DBG_NFO_GOUT_BLK_MCU_UID_SYSREG_IPCLKPORT_PCLK		((void *)(S5J_CMU_BASE + 0x6128))
#define DBG_NFO_GOUT_BLK_MCU_UID_TICK_COUNTER_IPCLKPORT_PCLK	((void *)(S5J_CMU_BASE + 0x612c))
#define DBG_NFO_GOUT_BLK_MCU_UID_TOP_RTC_IPCLKPORT_PCLK		((void *)(S5J_CMU_BASE + 0x6130))
#define DBG_NFO_GOUT_BLK_MCU_UID_UART0_IPCLKPORT_EXT_UCLK	((void *)(S5J_CMU_BASE + 0x6134))
#define DBG_NFO_GOUT_BLK_MCU_UID_UART0_IPCLKPORT_PCLK		((void *)(S5J_CMU_BASE + 0x6138))
#define DBG_NFO_GOUT_BLK_MCU_UID_UART1_IPCLKPORT_EXT_UCLK	((void *)(S5J_CMU_BASE + 0x613c))
#define DBG_NFO_GOUT_BLK_MCU_UID_UART1_IPCLKPORT_PCLK		((void *)(S5J_CMU_BASE + 0x6140))
#define DBG_NFO_GOUT_BLK_MCU_UID_UART2_IPCLKPORT_EXT_UCLK	((void *)(S5J_CMU_BASE + 0x6144))
#define DBG_NFO_GOUT_BLK_MCU_UID_UART2_IPCLKPORT_PCLK		((void *)(S5J_CMU_BASE + 0x6148))
#define DBG_NFO_GOUT_BLK_MCU_UID_UART3_IPCLKPORT_EXT_UCLK	((void *)(S5J_CMU_BASE + 0x614c))
#define DBG_NFO_GOUT_BLK_MCU_UID_UART3_IPCLKPORT_PCLK		((void *)(S5J_CMU_BASE + 0x6150))
#define DBG_NFO_GOUT_BLK_MCU_UID_UART_DEBUG_IPCLKPORT_EXT_UCLK	((void *)(S5J_CMU_BASE + 0x6154))
#define DBG_NFO_GOUT_BLK_MCU_UID_UART_DEBUG_IPCLKPORT_PCLK		((void *)(S5J_CMU_BASE + 0x6158))
#define DBG_NFO_GOUT_BLK_MCU_UID_UHD_EFUSE_WRITER_IPCLKPORT_PCLK	((void *)(S5J_CMU_BASE + 0x615c))
#define DBG_NFO_GOUT_BLK_MCU_UID_US_32TO64_CM0P_IPCLKPORT_ACLK	((void *)(S5J_CMU_BASE + 0x6160))
#define DBG_NFO_GOUT_BLK_MCU_UID_US_32TO64_PDMA_IPCLKPORT_ACLK	((void *)(S5J_CMU_BASE + 0x6164))
#define DBG_NFO_GOUT_BLK_MCU_UID_US_32TO64_SDIO_IPCLKPORT_ACLK	((void *)(S5J_CMU_BASE + 0x6168))
#define DBG_NFO_GOUT_BLK_MCU_UID_WDT_IPCLKPORT_PCLK			((void *)(S5J_CMU_BASE + 0x616c))
#define DBG_NFO_GOUT_BLK_MCU_UID_XIU_P_T20_IPCLKPORT_ACLK	((void *)(S5J_CMU_BASE + 0x6174))
#define DBG_NFO_DMYQCH_CON_ISO_CR4_QCH		((void *)(S5J_CMU_BASE + 0x7014))
#define DBG_NFO_DMYQCH_CON_XIU_D_T20_QCH	((void *)(S5J_CMU_BASE + 0x7020))
#define DBG_NFO_QCH_CON_LHM_AXI_D_WIFI_QCH	((void *)(S5J_CMU_BASE + 0x7024))
#define DBG_NFO_QCH_CON_LHM_DP_QCH			((void *)(S5J_CMU_BASE + 0x7028))
#define DBG_NFO_QCH_CON_LHS_DP_QCH			((void *)(S5J_CMU_BASE + 0x702c))
#define DBG_NFO_QCH_CON_MCU_CMU_MCU_QCH		((void *)(S5J_CMU_BASE + 0x7030))

#define SSS_CMU_CONTROLLER_OPTION	((void *)(S5J_CMU_SSS_BASE + 0x0800))
#define SSS_SPARE0	((void *)(S5J_CMU_SSS_BASE + 0x0a00))
#define SSS_SPARE1	((void *)(S5J_CMU_SSS_BASE + 0x0a04))
#define CLK_CON_GAT_CLK_BLK_SSS_UID_SSS_CMU_SSS_IPCLKPORT_PCLK		((void *)(S5J_CMU_SSS_BASE + 0x2000))
#define CLK_CON_GAT_GOUT_BLK_SSS_UID_DS_128TO64_IPCLKPORT_ACLK		((void *)(S5J_CMU_SSS_BASE + 0x2004))
#define CLK_CON_GAT_GOUT_BLK_SSS_UID_ISO_SSS_IPCLKPORT_I_ACLK		((void *)(S5J_CMU_SSS_BASE + 0x2008))
#define CLK_CON_GAT_GOUT_BLK_SSS_UID_ISO_SSS_IPCLKPORT_I_PCLK		((void *)(S5J_CMU_SSS_BASE + 0x200c))
#define CLK_CON_GAT_GOUT_BLK_SSS_UID_ISO_SSS_IPCLKPORT_I_SLVHCLK	((void *)(S5J_CMU_SSS_BASE + 0x2010))
#define CLK_CON_GAT_GOUT_BLK_SSS_UID_RSTNSYNC_CLK_BUS_D0_SSS_IPCLKPORT_CLK	((void *)(S5J_CMU_SSS_BASE + 0x2014))
#define CLK_CON_GAT_GOUT_BLK_SSS_UID_RSTNSYNC_CLK_BUS_P0_SSS_IPCLKPORT_CLK	((void *)(S5J_CMU_SSS_BASE + 0x2018))
#define QCH_CON_ISO_SSS_QCH				((void *)(S5J_CMU_SSS_BASE + 0x3000))
#define QCH_CON_SSS_CMU_SSS_QCH			((void *)(S5J_CMU_SSS_BASE + 0x3004))
#define QUEUE_CTRL_REG_BLK_SSS_CMU_SSS	((void *)(S5J_CMU_SSS_BASE + 0x3c00))
#define DBG_NFO_CLK_BLK_SSS_UID_SSS_CMU_SSS_IPCLKPORT_PCLK		((void *)(S5J_CMU_SSS_BASE + 0x6000))
#define DBG_NFO_GOUT_BLK_SSS_UID_DS_128TO64_IPCLKPORT_ACLK		((void *)(S5J_CMU_SSS_BASE + 0x6004))
#define DBG_NFO_GOUT_BLK_SSS_UID_ISO_SSS_IPCLKPORT_I_ACLK		((void *)(S5J_CMU_SSS_BASE + 0x6008))
#define DBG_NFO_GOUT_BLK_SSS_UID_ISO_SSS_IPCLKPORT_I_PCLK		((void *)(S5J_CMU_SSS_BASE + 0x600c))
#define DBG_NFO_GOUT_BLK_SSS_UID_ISO_SSS_IPCLKPORT_I_SLVHCLK	((void *)(S5J_CMU_SSS_BASE + 0x6010))
#define DBG_NFO_GOUT_BLK_SSS_UID_RSTNSYNC_CLK_BUS_D0_SSS_IPCLKPORT_CLK	((void *)(S5J_CMU_SSS_BASE + 0x6014))
#define DBG_NFO_GOUT_BLK_SSS_UID_RSTNSYNC_CLK_BUS_P0_SSS_IPCLKPORT_CLK	((void *)(S5J_CMU_SSS_BASE + 0x6018))
#define DBG_NFO_QCH_CON_ISO_SSS_QCH		((void *)(S5J_CMU_SSS_BASE + 0x7000))
#define DBG_NFO_QCH_CON_SSS_CMU_SSS_QCH	((void *)(S5J_CMU_SSS_BASE + 0x7004))

#endif /* __ARCH_ARM_SRC_S5J_S5J_CMU_H__ */
